CISC VS RISC

[MahendraPratapSingh]

I .COMPUTER ARCHITECTURE

Computer architecture is a specification detailing how a set of software and hardware technology standards interact to form a computer system or platform. In short, computer architecture refers to how a computer system is designed and what technologies it is compatible with.

Computer architecture involves the design of computers.Processor design involves the instruction set design and the organisation of the processor.

Instruction set architecture (ISA) describes the processor in terms of what the assembly language programmer sees, i.e. the instructions and registers.

Organisation is concerned with the internal design of the processor, the design of the bus system and its interfaces, the design of memory and so on. Two machines may have the same ISA, but different organisations.

A very good example of computer architecture is Von Neumann architecture, which is still used by most types of computers today. This was proposed by the mathematician John Von Neumann in 1945. It describes the design of an electronic computer with its CPU, which includes the arithmetic logic unit, control unit, registers, memory for data and instructions, an input/output interface and external storage functions.

There are many different kinds of computer architectures.
One way of categorizing computer architectures is by number of instructions executed per clock. 
Some various architecture are:

1.CISC
2.RISC
3.MIPS
4.TTA
5.DSP

We are going to deal with comparative study of CSIC and RISC architecture on the basis of following parameter:

1.Instruction Set Architecture
2.Pipelining
3.Performance

II.CISC

Stands for "Complex Instruction Set Computing." This is a type of microprocessor design. The CISC architecture contains a large set of computer instructions that range from very simple to very complex and specialized. Though the design was intended to compute complex instructions in the most efficient way, it was later found that many small, short instructions could compute complex instructions more efficiently. This led to a design called Reduced Instruction Set Computing (RISC), which is now the other major kind of microprocessor architecture. Intel Pentium processors are mainly CISC-based, with some RISC facilities built into them, whereas the PowerPC processors are completely RISC-based.

III.RISC

Stands for "Reduced Instruction Set Computing and is pronounced "risk." It is arguably the fastest and most efficient microprocessor technology available today. The RISC architecture is an improvement upon the CISC (Complex Instruction Set Computing) architecture used in the original Intel Pentium chips. In 1974, John Cocke of IBM Research was working on making a faster version of the CISC chip and came up with a design that significantly reduced the number of instructions need for performing computations. The new design was not only faster than the CISC architecture, but the chips were also smaller and less expensive to manufacture. Motorola's PowerPC chips (such as the G4 in Power Macs) are the most widely used RISC-based chips. Intel has slowly been integrating RISC technology into its chips, but they still are mostly CISC-based.

IV.CISC VS RISC

There is still considerable controversy among experts about which architecture is better. Some say that RISC is cheaper and faster and therefore the architecture of the future. Others note that by making the hardware simpler ,RISC puts a greater burden on the software. Software needs to become more complex. Software developers need to write more lines for the same tasks. Therefore they argue that RISC is not the architecture of the future, since conventional CISC chips are becoming faster and cheaper anyway.

Is RISC than really not better? The answer isn't quite that simple. RISC and CISC architectures are becoming more and more alike. Many of today's RISC chips support just as many instructions as yesterday's CISC chips. The PowerPC 601, for example, supports more instructions than the Pentium. Yet the 601 is considered a RISC chip, while the Pentium is definitely CISC. Furthermore today's CISC chips use many techniques formerly associated with RISC chips.

DIFFERENCE BETWEEN CISC AND RISC

CISC

1.very large instruction sets reaching up to and above three hundred separate instructions.   2. Performance was improved by allowing the simplification of program compilers, as the range of more advanced instructions available led to less refinements having to be made at the compilation process. However, the complexity of the processor hardware and architecture that resulted can cause such chips to be difficult to understand and program for, and also means they can be expensive to produce.

3.

Instruction pipelining can not be implemented easily.

4.

Many complex instructions can access memory, such as direct addition between data in two memory locations.

5.

Mainly used in normal PC’s, Workstations and servers.

6.

CISC systems shorten execution time by reducing the number of instructions per program.

7. Examples of CISC Processors: Intel x86.

 

RISC

1. Small set of instructions.

2. simplified and reduced instruction set, numbering one hundred instructions or less. because of simple instructions, RISC chips requires fewer transistors to produce processors. Also the reduced instruction set means that the processor can execute the instructions more quickly, potentially allowing for greater speeds. However, only allowing such simple instructions means a greater burden is placed upon the software itself. Less instructions in the instruction set means a greater emphasis on the efficient writing of software with the instructions that are available. 3. Instruction pipelining can be implemented easily. 4. Only LOAD/STORE instructions can access memory. 5. Mainly used for real time applications. 6. RISC systems shorten execution time by reducing the clockcycles per instruction (i.e. simple instructions take less time to interpret). 7. Examples of RISC Processors: Atmel AVR, PIC, ARM   V.Comparative Study Of RISC And CISC Architecture Lets have a brief comparsion between these two architectures on the basis of following parameters: 1.ISA 2.Pipelining 3.Performance 1. Instruction Set Architecture(ISA) An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine language), and the native commands implemented by a particular processor. An instruction set specifies a processor’s functionality – what operations it supports – what storage mechanisms it has & how they are accessed – programmer/compiler uses instruction set to communicate programs to processor     Lets have a comparative study of both the instruction set of CISC and RISC architecture taking into consideration Intel 8086 from CISC family and MIPS from RISC on the basis of various functionality such as addressing modes,memory,instruction etc. Class of ISA   Nearly all ISAs today are classified as general-purpose register architectures, where the operands are either registers or memory locations. The 80×86 has 16 general-purpose registers and 16 that can hold floating point data, while MIPS has 32 general-purpose and 32 floating-point registers.The two popular versions of this class are register-memory ISAs such as the 80×86, which can access memory as part of many instructions, and load-store ISAs such as MIPS, which can access memory only with load or store instructions. All recent ISAs are load-store.   Memory addressing   Virtually all desktop and server computers, including the 80×86 and MIPS, use byte addressing to access memory operands. Some architectures, like MIPS, require that objects must be aligned. An access to an object of size s bytes at byte address A is aligned if A mod s =0. The 80×86 does not require alignment, but accesses are generally faster if operands are aligned.   Addressing modes   In addition to specifying registers and constant operands, addressing modes specify the address of a memory object. MIPS addressing modes are Register, Immediate (for constants), and Displacement, where aconstant offset is added to a register to form the memory address.   The 80x86supports those three plus three variations of displacement: no register (absolute),two registers (based indexed with displacement), two registers where one register is multiplied by the size of the operand in bytes (based with scaled index and displacement). It has more like the last three, minus the displacement field: register indirect, indexed, and based with scaled index.   Types and sizes of operands   Like most ISAs, MIPS and 80×86 support operand sizes of 8-bit (ASCII character), 16-bit (Unicode character or half word), 32-bit (integer or word), 64-bit (double word or long integer), and IEEE 754 floating point in 32-bit (single precision) and 64-bit (double precision). The 80×86 also supports 80-bit floating point (extended double precision).   Operations   The general categories of operations are data transfer, arithmetic logical, control (discussed next), and floating point. MIPS is a simple and easy-to-pipeline instruction set architecture, and it is representative of the RISC architectures being used in 2006. Figure 1.5 summarizes the MIPS ISA.The 80×86 has a much richer and larger set of operations.     Control flow instructions   Virtually all ISAs, including 80×86 and MIPS, support conditional branches, unconditional jumps, procedure calls, and returns. Both use PC-relative addressing, where the branch address is specified by an address field that is added to the PC. There are some small differences. MIPS conditional branches (BE,BNE etc.) test the contents of registers,while the 80×86 branches (JE,JNE etc.) test condition code bits set as side effects of arithmetic/logic operations. MIPS procedure call (JAL) places the return address in a register, while the 80×86 call (CALLF) places the return address on a stack in memory.   Encoding an ISA   There are two basic choices on encoding: fixed length andvariable length All MIPS instructions are 32 bits long, which simplifiesinstruction decoding. The 80×86 encoding is variable length, ranging from 1 to 18 bytes. Variable length instructions can take less space than fixed-length instructions, so a program compiled for the 80×86 is usually smaller than the same program compiled for MIPS. Note that choices mentioned above will affect how the instructions are encoded into a binary representation. For example, the number of registers and the number of addressing modes both have a significant impact on the size of instructions, as the register field and addressing mode field can appear many times in a single instruction.

[AJISH ALFRED]

Nice one

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