Microcontroller › PIC › Communication between PIC16F877 and CC1120
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sumit.
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February 20, 2017 at 5:31 pm #4614
Dusan Kovacevic
ParticipantHi all,
Need help to implement small app where two sides (PIC + ccrf2 each side) exchange data. For now, I am just trying to make a connection to ccrf2 and calibrate it but it's not going well. I am using UART for debugging, and software gets stuck in first do-while loop in manualCalibration() function, SPI_ReadExtended() never reads 0x41.
I am programming PICs on EasyPIC5 board, using MPLAB X IDE v3.30. Also, I am using cc112x_easy_link as reference guide.
Code:
#include <xc.h>
#include <math.h>
#include <stdint.h>#define _XTAL_FREQ 10000000
// CONFIG
#pragma config FOSC = XT // Oscillator Selection bits (RC oscillator)
#pragma config WDTE = OFF // Watchdog Timer Enable bit (WDT enabled)
#pragma config PWRTE = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config CP = OFF // FLASH Program Memory Code Protection bits (Code protection off)
#pragma config BOREN = OFF // Brown-out Reset Enable bit (BOR disabled)
#pragma config LVP = OFF // Low Voltage In-Circuit Serial Programming Enable bit (RB3 is digital I/O, HV on MCLR must be used for programming)
#pragma config CPD = OFF // Data EE Memory Code Protection (Code Protection off)
#pragma config WRT = ON // FLASH Program Memory Write Enable (Unprotected program memory may be written to by EECON control)/******************************************************************************
* CONSTANTS
*//* configuration registers */
#define CC112X_IOCFG3 (uint8_t)0x0000
#define CC112X_IOCFG2 (uint8_t)0x0001
#define CC112X_IOCFG1 (uint8_t)0x0002
#define CC112X_IOCFG0 (uint8_t)0x0003
#define CC112X_SYNC3 (uint8_t)0x0004
#define CC112X_SYNC2 (uint8_t)0x0005
#define CC112X_SYNC1 (uint8_t)0x0006
#define CC112X_SYNC0 (uint8_t)0x0007
#define CC112X_SYNC_CFG1 (uint8_t)0x0008
#define CC112X_SYNC_CFG0 (uint8_t)0x0009
#define CC112X_DEVIATION_M (uint8_t)0x000A
#define CC112X_MODCFG_DEV_E (uint8_t)0x000B
#define CC112X_DCFILT_CFG (uint8_t)0x000C
#define CC112X_PREAMBLE_CFG1 (uint8_t)0x000D
#define CC112X_PREAMBLE_CFG0 (uint8_t)0x000E
#define CC112X_FREQ_IF_CFG (uint8_t)0x000F
#define CC112X_IQIC (uint8_t)0x0010
#define CC112X_CHAN_BW (uint8_t)0x0011
#define CC112X_MDMCFG1 (uint8_t)0x0012
#define CC112X_MDMCFG0 (uint8_t)0x0013
#define CC112X_SYMBOL_RATE2 (uint8_t)0x0014
#define CC112X_SYMBOL_RATE1 (uint8_t)0x0015
#define CC112X_SYMBOL_RATE0 (uint8_t)0x0016
#define CC112X_AGC_REF (uint8_t)0x0017
#define CC112X_AGC_CS_THR (uint8_t)0x0018
#define CC112X_AGC_GAIN_ADJUST (uint8_t)0x0019
#define CC112X_AGC_CFG3 (uint8_t)0x001A
#define CC112X_AGC_CFG2 (uint8_t)0x001B
#define CC112X_AGC_CFG1 (uint8_t)0x001C
#define CC112X_AGC_CFG0 (uint8_t)0x001D
#define CC112X_FIFO_CFG (uint8_t)0x001E
#define CC112X_DEV_ADDR (uint8_t)0x001F
#define CC112X_SETTLING_CFG (uint8_t)0x0020
#define CC112X_FS_CFG (uint8_t)0x0021
#define CC112X_WOR_CFG1 (uint8_t)0x0022
#define CC112X_WOR_CFG0 (uint8_t)0x0023
#define CC112X_WOR_EVENT0_MSB (uint8_t)0x0024
#define CC112X_WOR_EVENT0_LSB (uint8_t)0x0025
#define CC112X_PKT_CFG2 (uint8_t)0x0026
#define CC112X_PKT_CFG1 (uint8_t)0x0027
#define CC112X_PKT_CFG0 (uint8_t)0x0028
#define CC112X_RFEND_CFG1 (uint8_t)0x0029
#define CC112X_RFEND_CFG0 (uint8_t)0x002A
#define CC112X_PA_CFG2 (uint8_t)0x002B
#define CC112X_PA_CFG1 (uint8_t)0x002C
#define CC112X_PA_CFG0 (uint8_t)0x002D
#define CC112X_PKT_LEN (uint8_t)0x002E/* Extended Configuration Registers */
#define CC112X_IF_MIX_CFG 0x2F00
#define CC112X_FREQOFF_CFG 0x2F01
#define CC112X_TOC_CFG 0x2F02
#define CC112X_MARC_SPARE 0x2F03
#define CC112X_ECG_CFG 0x2F04
#define CC112X_CFM_DATA_CFG 0x2F05
#define CC112X_EXT_CTRL 0x2F06
#define CC112X_RCCAL_FINE 0x2F07
#define CC112X_RCCAL_COARSE 0x2F08
#define CC112X_RCCAL_OFFSET 0x2F09
#define CC112X_FREQOFF1 0x2F0A
#define CC112X_FREQOFF0 0x2F0B
#define CC112X_FREQ2 0x2F0C
#define CC112X_FREQ1 0x2F0D
#define CC112X_FREQ0 0x2F0E
#define CC112X_IF_ADC2 0x2F0F
#define CC112X_IF_ADC1 0x2F10
#define CC112X_IF_ADC0 0x2F11
#define CC112X_FS_DIG1 0x2F12
#define CC112X_FS_DIG0 0x2F13
#define CC112X_FS_CAL3 0x2F14
#define CC112X_FS_CAL2 0x2F15
#define CC112X_FS_CAL1 0x2F16
#define CC112X_FS_CAL0 0x2F17
#define CC112X_FS_CHP 0x2F18
#define CC112X_FS_DIVTWO 0x2F19
#define CC112X_FS_DSM1 0x2F1A
#define CC112X_FS_DSM0 0x2F1B
#define CC112X_FS_DVC1 0x2F1C
#define CC112X_FS_DVC0 0x2F1D
#define CC112X_FS_LBI 0x2F1E
#define CC112X_FS_PFD 0x2F1F
#define CC112X_FS_PRE 0x2F20
#define CC112X_FS_REG_DIV_CML 0x2F21
#define CC112X_FS_SPARE 0x2F22
#define CC112X_FS_VCO4 0x2F23
#define CC112X_FS_VCO3 0x2F24
#define CC112X_FS_VCO2 0x2F25
#define CC112X_FS_VCO1 0x2F26
#define CC112X_FS_VCO0 0x2F27
#define CC112X_GBIAS6 0x2F28
#define CC112X_GBIAS5 0x2F29
#define CC112X_GBIAS4 0x2F2A
#define CC112X_GBIAS3 0x2F2B
#define CC112X_GBIAS2 0x2F2C
#define CC112X_GBIAS1 0x2F2D
#define CC112X_GBIAS0 0x2F2E
#define CC112X_IFAMP 0x2F2F
#define CC112X_LNA 0x2F30
#define CC112X_RXMIX 0x2F31
#define CC112X_XOSC5 0x2F32
#define CC112X_XOSC4 0x2F33
#define CC112X_XOSC3 0x2F34
#define CC112X_XOSC2 0x2F35
#define CC112X_XOSC1 0x2F36
#define CC112X_XOSC0 0x2F37
#define CC112X_ANALOG_SPARE 0x2F38
#define CC112X_PA_CFG3 0x2F39
#define CC112X_IRQ0M 0x2F3F
#define CC112X_IRQ0F 0x2F40/* Status Registers */
#define CC112X_WOR_TIME1 0x2F64
#define CC112X_WOR_TIME0 0x2F65
#define CC112X_WOR_CAPTURE1 0x2F66
#define CC112X_WOR_CAPTURE0 0x2F67
#define CC112X_BIST 0x2F68
#define CC112X_DCFILTOFFSET_I1 0x2F69
#define CC112X_DCFILTOFFSET_I0 0x2F6A
#define CC112X_DCFILTOFFSET_Q1 0x2F6B
#define CC112X_DCFILTOFFSET_Q0 0x2F6C
#define CC112X_IQIE_I1 0x2F6D
#define CC112X_IQIE_I0 0x2F6E
#define CC112X_IQIE_Q1 0x2F6F
#define CC112X_IQIE_Q0 0x2F70
#define CC112X_RSSI1 0x2F71
#define CC112X_RSSI0 0x2F72
#define CC112X_MARCSTATE 0x2F73
#define CC112X_LQI_VAL 0x2F74
#define CC112X_PQT_SYNC_ERR 0x2F75
#define CC112X_DEM_STATUS 0x2F76
#define CC112X_FREQOFF_EST1 0x2F77
#define CC112X_FREQOFF_EST0 0x2F78
#define CC112X_AGC_GAIN3 0x2F79
#define CC112X_AGC_GAIN2 0x2F7A
#define CC112X_AGC_GAIN1 0x2F7B
#define CC112X_AGC_GAIN0 0x2F7C
#define CC112X_CFM_RX_DATA_OUT 0x2F7D
#define CC112X_CFM_TX_DATA_IN 0x2F7E
#define CC112X_ASK_SOFT_RX_DATA 0x2F7F
#define CC112X_RNDGEN 0x2F80
#define CC112X_MAGN2 0x2F81
#define CC112X_MAGN1 0x2F82
#define CC112X_MAGN0 0x2F83
#define CC112X_ANG1 0x2F84
#define CC112X_ANG0 0x2F85
#define CC112X_CHFILT_I2 0x2F86
#define CC112X_CHFILT_I1 0x2F87
#define CC112X_CHFILT_I0 0x2F88
#define CC112X_CHFILT_Q2 0x2F89
#define CC112X_CHFILT_Q1 0x2F8A
#define CC112X_CHFILT_Q0 0x2F8B
#define CC112X_GPIO_STATUS 0x2F8C
#define CC112X_FSCAL_CTRL 0x2F8D
#define CC112X_PHASE_ADJUST 0x2F8E
#define CC112X_PARTNUMBER 0x2F8F
#define CC112X_PARTVERSION 0x2F90
#define CC112X_SERIAL_STATUS 0x2F91
#define CC112X_MODEM_STATUS1 0x2F92
#define CC112X_MODEM_STATUS0 0x2F93
#define CC112X_MARC_STATUS1 0x2F94
#define CC112X_MARC_STATUS0 0x2F95
#define CC112X_PA_IFAMP_TEST 0x2F96
#define CC112X_FSRF_TEST 0x2F97
#define CC112X_PRE_TEST 0x2F98
#define CC112X_PRE_OVR 0x2F99
#define CC112X_ADC_TEST 0x2F9A
#define CC112X_DVC_TEST 0x2F9B
#define CC112X_ATEST 0x2F9C
#define CC112X_ATEST_LVDS 0x2F9D
#define CC112X_ATEST_MODE 0x2F9E
#define CC112X_XOSC_TEST1 0x2F9F
#define CC112X_XOSC_TEST0 0x2FA0
#define CC112X_RXFIRST 0x2FD2
#define CC112X_TXFIRST 0x2FD3
#define CC112X_RXLAST 0x2FD4
#define CC112X_TXLAST 0x2FD5
#define CC112X_NUM_TXBYTES 0x2FD6 /* Number of bytes in TXFIFO */
#define CC112X_NUM_RXBYTES 0x2FD7 /* Number of bytes in RXFIFO */
#define CC112X_FIFO_NUM_TXBYTES 0x2FD8
#define CC112X_FIFO_NUM_RXBYTES 0x2FD9
/* DATA FIFO Access */
#define CC112X_SINGLE_TXFIFO (uint8_t)0x003F /* TXFIFO – Single accecss to Transmit FIFO */
#define CC112X_BURST_TXFIFO (uint8_t)0x007F /* TXFIFO – Burst accecss to Transmit FIFO */
#define CC112X_SINGLE_RXFIFO (uint8_t)0x00BF /* RXFIFO – Single accecss to Receive FIFO */
#define CC112X_BURST_RXFIFO (uint8_t)0x00FF /* RXFIFO – Busrrst ccecss to Receive FIFO */#define CC112X_LQI_CRC_OK_BM (uint8_t)0x80
#define CC112X_LQI_EST_BM (uint8_t)0x7F/* Command strobe registers */
#define CC112X_SRES (uint8_t)0x30 /* SRES – Reset chip. */
#define CC112X_SFSTXON (uint8_t)0x31 /* SFSTXON – Enable and calibrate frequency synthesizer. */
#define CC112X_SXOFF (uint8_t)0x32 /* SXOFF – Turn off crystal oscillator. */
#define CC112X_SCAL (uint8_t)0x33 /* SCAL – Calibrate frequency synthesizer and turn it off. */
#define CC112X_SRX (uint8_t)0x34 /* SRX – Enable RX. Perform calibration if enabled. */
#define CC112X_STX (uint8_t)0x35 /* STX – Enable TX. If in RX state, only enable TX if CCA passes. */
#define CC112X_SIDLE (uint8_t)0x36 /* SIDLE – Exit RX / TX, turn off frequency synthesizer. */
#define CC112X_SWOR (uint8_t)0x38 /* SWOR – Start automatic RX polling sequence (Wake-on-Radio) */
#define CC112X_SPWD (uint8_t)0x39 /* SPWD – Enter power down mode when CSn goes high. */
#define CC112X_SFRX (uint8_t)0x3A /* SFRX – Flush the RX FIFO buffer. */
#define CC112X_SFTX (uint8_t)0x3B /* SFTX – Flush the TX FIFO buffer. */
#define CC112X_SWORRST (uint8_t)0x3C /* SWORRST – Reset real time clock. */
#define CC112X_SNOP (uint8_t)0x3D /* SNOP – No operation. Returns status byte. */
#define CC112X_AFC (uint8_t)0x37 /* AFC – Automatic Frequency Correction *//* Chip states returned in status byte */
#define CC112X_STATE_IDLE (uint8_t)0x00
#define CC112X_STATE_RX (uint8_t)0x10
#define CC112X_STATE_TX (uint8_t)0x20
#define CC112X_STATE_FSTXON (uint8_t)0x30
#define CC112X_STATE_CALIBRATE (uint8_t)0x40
#define CC112X_STATE_SETTLING (uint8_t)0x50
#define CC112X_STATE_RXFIFO_ERROR (uint8_t)0x60
#define CC112X_STATE_TXFIFO_ERROR (uint8_t)0x70#define VCDAC_START_OFFSET 2
#define FS_VCO2_INDEX 0
#define FS_VCO4_INDEX 1
#define FS_CHP_INDEX 2#define RADIO_READ_ACCESS (uint8_t)0x80
typedef struct
{
uint16_t addr;
uint8_t data;
}registerSetting_t;static const registerSetting_t preferredSettings[] = {
{CC112X_IOCFG3, 0xB0},
{CC112X_IOCFG2, 0x06},
{CC112X_IOCFG1, 0xB0},
{CC112X_IOCFG0, 0x40},
{CC112X_SYNC3, 0x55},
{CC112X_SYNC2, 0x55},
{CC112X_SYNC1, 0x7A},
{CC112X_SYNC0, 0x0E},
{CC112X_SYNC_CFG1, 0x08},
{CC112X_SYNC_CFG0, 0x0B},
{CC112X_DEVIATION_M, 0x99},
{CC112X_MODCFG_DEV_E, 0x0D},
{CC112X_DCFILT_CFG, 0x15},
{CC112X_PREAMBLE_CFG1, 0x18},
{CC112X_FREQ_IF_CFG, 0x3A},
{CC112X_IQIC, 0x00},
{CC112X_CHAN_BW, 0x02},
{CC112X_MDMCFG0, 0x05},
{CC112X_SYMBOL_RATE2, 0x99},
{CC112X_SYMBOL_RATE1, 0x99},
{CC112X_SYMBOL_RATE0, 0x99},
{CC112X_AGC_REF, 0x3C},
{CC112X_AGC_CS_THR, 0xEF},
{CC112X_AGC_CFG1, 0xA9},
{CC112X_AGC_CFG0, 0xC0},
{CC112X_FIFO_CFG, 0x00},
{CC112X_FS_CFG, 0x12},
{CC112X_PKT_CFG0, 0x20},
{CC112X_PA_CFG0, 0x79},
{CC112X_PKT_LEN, 0xFF},
{CC112X_IF_MIX_CFG, 0x00},
{CC112X_TOC_CFG, 0x0A},
{CC112X_FREQ2, 0x6C},
{CC112X_FREQ1, 0x80},
{CC112X_FS_DIG1, 0x00},
{CC112X_FS_DIG0, 0x5F},
{CC112X_FS_CAL1, 0x40},
{CC112X_FS_CAL0, 0x0E},
{CC112X_FS_DIVTWO, 0x03},
{CC112X_FS_DSM0, 0x33},
{CC112X_FS_DVC0, 0x17},
{CC112X_FS_PFD, 0x50},
{CC112X_FS_PRE, 0x6E},
{CC112X_FS_REG_DIV_CML, 0x14},
{CC112X_FS_SPARE, 0xAC},
{CC112X_XOSC5, 0x0E},
{CC112X_FS_VCO0, 0xB4},
{CC112X_XOSC1, 0x03},
};void UARTinit(void) {
TRISC6 = 0;
TRISC7 = 1;
SPBRG = 15;
TX9 = 0;
TXEN = 1;
SYNC = 0;
BRGH = 0;
SPEN = 1;
RX9 = 0;
CREN = 1;
}void SPIinit(void) {
SSPEN = 0;
TRISCbits.TRISC4 = 1;
TRISCbits.TRISC5 = 0;
TRISCbits.TRISC3 = 0;
TRISAbits.TRISA5 = 0;
SSPSTAT = 0x40;
SSPCON = 0x20;
PORTAbits.RA5 = 1;
}uint8_t SPI_Strobe(uint8_t cmd)
{
uint8_t result = 0;
PORTAbits.RA5 = 0;
SSPBUF = cmd;
while(!SSPSTATbits.BF);
result = SSPBUF;
PORTAbits.RA5 = 1;return(result);
}uint8_t SPI_Write(uint8_t addr, uint8_t data)
{
uint8_t tmp = 0;
// Activate the SS SPI Select pin
PORTAbits.RA5 = 0;
SSPBUF = addr;
while(!SSPSTATbits.BF);
SSPBUF = data;
while(!SSPSTATbits.BF);
tmp = SSPBUF;// CS pin is not active
PORTAbits.RA5 = 1;
return tmp;
}void SPI_WriteExtended(uint16_t addr, uint8_t data)
{
uint8_t ext = (uint8_t)(addr >>;
uint8_t reg = (uint8_t)(addr & 0xFF);
// Activate the SS SPI Select pin
PORTAbits.RA5 = 0;
SSPBUF = ext;
while(!SSPSTATbits.BF);
SSPBUF = reg;
while(!SSPSTATbits.BF);
SSPBUF = data;
while(!SSPSTATbits.BF);// CS pin is not active
PORTAbits.RA5 = 1;
}uint8_t SPI_Read(uint8_t addr)
{
//uint8_t tmp = 0;
// Activate the SS SPI Select pin
PORTAbits.RA5 = 0;SSPBUF = RADIO_READ_ACCESS|addr;
while(!SSPSTATbits.BF);
SSPBUF = 0x00;
while(!SSPSTATbits.BF);// CS pin is not active
PORTAbits.RA5 = 1;return(SSPBUF);
}uint8_t SPI_ReadExtended(uint16_t addr)
{
uint8_t ext = (uint8_t)(addr >>;
uint8_t reg = (uint8_t)(addr & 0xFF);
// Activate the SS SPI Select pin
PORTAbits.RA5 = 0;SSPBUF = RADIO_READ_ACCESS|ext;
while(!SSPSTATbits.BF);
SSPBUF = reg;
while(!SSPSTATbits.BF);
SSPBUF = 0x00;
while(!SSPSTATbits.BF);// CS pin is not active
PORTAbits.RA5 = 1;return(SSPBUF);
}static void manualCalibration(void) {
uint8_t original_fs_cal2;
uint8_t calResults_for_vcdac_start_high[3];
uint8_t calResults_for_vcdac_start_mid[3];
uint8_t marcstate;
uint8_t writeByte;
uint8_t tmp;// 1) Set VCO cap-array to 0 (FS_VCO2 = 0x00)
writeByte = 0x00;
SPI_WriteExtended(CC112X_FS_VCO2, writeByte);
while(!TXIF);
TXREG = 0xCC;
// 2) Start with high VCDAC (original VCDAC_START + 2):
original_fs_cal2 = SPI_ReadExtended(CC112X_FS_CAL2);
writeByte = original_fs_cal2 + VCDAC_START_OFFSET;
SPI_WriteExtended(CC112X_FS_CAL2, writeByte);// 3) Calibrate and wait for calibration to be done
// (radio back in IDLE state)
tmp = SPI_Strobe(CC112X_SCAL);
do {
marcstate = SPI_ReadExtended(CC112X_MARCSTATE);
} while (marcstate != 0x41);
while(!TXIF);
TXREG = 0xAA;// 4) Read FS_VCO2, FS_VCO4 and FS_CHP register obtained with
// high VCDAC_START value
calResults_for_vcdac_start_high[FS_VCO2_INDEX] = SPI_ReadExtended(CC112X_FS_VCO2);
calResults_for_vcdac_start_high[FS_VCO4_INDEX] = SPI_ReadExtended(CC112X_FS_VCO4);
calResults_for_vcdac_start_high[FS_CHP_INDEX] = SPI_ReadExtended(CC112X_FS_CHP);// 5) Set VCO cap-array to 0 (FS_VCO2 = 0x00)
writeByte = 0x00;
SPI_WriteExtended(CC112X_FS_VCO2, writeByte);// 6) Continue with mid VCDAC (original VCDAC_START):
writeByte = original_fs_cal2;
SPI_WriteExtended(CC112X_FS_CAL2, writeByte);// 7) Calibrate and wait for calibration to be done
// (radio back in IDLE state)
SPI_Strobe(CC112X_SCAL);do {
marcstate = SPI_ReadExtended(CC112X_MARCSTATE);
} while (marcstate != 0x41);//
Read FS_VCO2, FS_VCO4 and FS_CHP register obtained
// with mid VCDAC_START value
calResults_for_vcdac_start_mid[FS_VCO2_INDEX] = SPI_ReadExtended(CC112X_FS_VCO2);
calResults_for_vcdac_start_mid[FS_VCO4_INDEX] = SPI_ReadExtended(CC112X_FS_VCO4);
calResults_for_vcdac_start_mid[FS_CHP_INDEX] = SPI_ReadExtended(CC112X_FS_CHP);// 9) Write back highest FS_VCO2 and corresponding FS_VCO
// and FS_CHP result
if (calResults_for_vcdac_start_high[FS_VCO2_INDEX] >
calResults_for_vcdac_start_mid[FS_VCO2_INDEX]) {
writeByte = calResults_for_vcdac_start_high[FS_VCO2_INDEX];
SPI_WriteExtended(CC112X_FS_VCO2, writeByte);
writeByte = calResults_for_vcdac_start_high[FS_VCO4_INDEX];
SPI_WriteExtended(CC112X_FS_VCO4, writeByte);
writeByte = calResults_for_vcdac_start_high[FS_CHP_INDEX];
SPI_WriteExtended(CC112X_FS_CHP, writeByte);
} else {
writeByte = calResults_for_vcdac_start_mid[FS_VCO2_INDEX];
SPI_WriteExtended(CC112X_FS_VCO2, writeByte);
writeByte = calResults_for_vcdac_start_mid[FS_VCO4_INDEX];
SPI_WriteExtended(CC112X_FS_VCO4, writeByte);
writeByte = calResults_for_vcdac_start_mid[FS_CHP_INDEX];
SPI_WriteExtended(CC112X_FS_CHP, writeByte);
}
}static void registerConfig(void) {
uint8_t writeByte;
uint8_t tmp = 0;// Reset radio
tmp = SPI_Strobe(CC112X_SRES);
// Write registers to radio
for(uint16_t i = 0;
i < 30; i++) {
writeByte = preferredSettings.data;
SPI_Write(preferredSettings.addr, writeByte);
}
// Write extended address registers to radio
for(uint16_t i = 30;
i < 48; i++) {
writeByte = preferredSettings.data;
SPI_WriteExtended(preferredSettings.addr, writeByte);
}
}static void runRX(void) {
// Calibrate radio according to errata
manualCalibration();// Set radio in RX
SPI_Strobe(CC112X_SRX);
}void main(void) {
UARTinit();
SPIinit();
// Write radio registers
registerConfig();// Enter runRX, never coming back
runRX();
while(1);
return;
}
What do you think, what am I doing wrong?
Thanks,
Dule
January 11, 2019 at 10:10 am #15005sumit
Participantinitialization of the uart port is missing in your code…first initialise the uart port and set a common baud rate for communication between two nodes
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