What I am trying to do is set up Timer 2 with interrupts each ~15ms, using the compare interrupt feature.
—I dont quite understand your problem… pls more info..
and about the TF2 bit. I dont think you need to clear the TF2..
Timer 2 Overflow (TF2.). This bit is set when T2 overflows. When T2 interrupt is enabled, this bit will cause the interrupt to be triggered. This bit will not be set if either TCLK or RCLK bits are set.